According to the structure of quasi - cyclic ldpc code , we can make a trade - off between hardware complexity and decoding throughput by applying semi - parallel architecture 摘要利用准循环ldpc码的结构特点,使用半并行结构的译码器可以实现复杂度和译码速率的有效折中。
To resolve the mismatch between high - speed a / d converters and dsp chips , a improvement parallel structure of ddc is put forward , which is based on poly - phase decomposition 接收机并行结构算法的工程实现:解决了前端采样的高速数据流远远超过后端dsp处理能力的问题。
Subsequently , a parallel architecture for the integer wavelet transform is present . and something about how the architecture works and some charts of this architecture are presented 然后提出一种实现整数小波变换的并行结构,分析了该结构内部的工作流程,并给出了详尽的原理图。
As an object for the application , die casting machine is introduced . stress and displacement test is recorded . the result of the test proves the validity of the methods 第六章对本文的工程应用背景一压铸机进行了试验研究,进行了应力应一变试验,验证了并行结构优化设计方法的有效性。
Compared to rtl code , using behavioral code can reduce code and verification effort , improve simulation performance , and it is prone to realize parallel constructs on serial processor 和trl代码相比,行为描述代码可以减少代码量和测试的工作量,提高仿真的性能,并更有利于在串行处理器上实现并行结构。