boundary scan中文是什么意思

• 边界扫描

• boundary    n. 边界，疆界，限界 (between);(球场)边线 ...
• scan    vt. (-nn-) 1.细看，细察；审视。 2.〔口语 ...
• scan boundary    边缘扫描
• boundary scan test    边界绍
• boundary-scan architecture    边界扫描结构
• boundary-scan chain    边界扫描链
• language boundary scan description    边缘扫描描述语言
• a scan    型扫描
• a-scan    a型扫掠; a型扫描; 形扫描
• are scan    弧形扫描
• scan    vt. (-nn-) 1.细看，细察；审视。 2.〔口语〕大略一阅；浏览。 3.按韵节念，按句调读，标出(诗)的格律(指划分音步)。 4.【电视】扫描；扫掠；搜索。 vi. 1.(诗)符合格律，读起来抑扬顿挫。 2.【无线电】扫描。 This line does not scan. 这一行不合韵律。 n. 1.细看；细察。 2.扫视，浏览。 3.【电视】扫描；扫掠。 4.眼界；视野。
• scan in    扫描输入
• scan-in    扫描输入; 扫入
• boundary    n. 边界，疆界，限界 (between);(球场)边线；界标；界限，范围，分野。 aboundary dispute 边界纠纷。 the boundary between Canada and the United States 美加国界。 boundaries on all sides 四方辐辏之所，四通八达。
• scan-to-scan fluctuation    各次扫描参数起伏
• travering scan depth scan    前后扫查
• boundary mark， boundary point    界址点
• a-mode scan    a型扫描
• a-scope; a-scan    型显示
• acce scan    存取扫描
• access scan    存取扫描; 存取扫瞄；存取搜索; 取数访问; 取数扫描
• acquistion scan    截获扫探
• arithmetic scan    算术扫描
• atama scan    扫瞄机
• automatic scan    自动扫描

• It is seen from the result of the experiment that pseudo exhaustive test with deltascan involvement is truly a simple and practical method to produce vectors for boundary scan , it is suitable for any kinds of boundary scan devices
  从试验结果可知，伪穷举法与deltascan相结合的确是生成边界扫描测试矢量的一个非常简单实用的方法，适用于任何一种边界扫描元件的测试矢量的生成。
• There are a lot of methods available to create test vector . the thesis addresses their characteristics of the methods and special structure of boundary scan circuit respectively and come to a conclusion of pseudo - exchausive testing the most rational method applied to this situation
  测试矢量的生成方法很多，本文在研究了各种方法的特性，以及边界扫描电路的特殊结构后，采用了伪穷举法生成测试矢量。
• Not only the scan route solution , the built - in self - test solution and the boundary scan solution of design for testability are summarized , but also the applications and countermeasures of these 3 solutions are analysed and compared in details
  摘要综述了超大规模集成电路的几种主要的可测试性设计技术，如扫描路径法、内建自测试法和边界扫描法等，并分析比较了这几种设计技术各自的特点及其应用方法和策略。
• As one of the design for testability technology , boundary scan test ( bst ) fixes boundary scan cells between the device pins and core logics . thus , the bsc acts as the virtual test probe that carries out the test stimulus and captures the test response
  作为一种结构插入的可测性技术,边界扫描测试( bst )技术将边界扫描寄存器单元安插在集成电路内部的每个引脚上,其作用相当于设置了施加激励和观测响应的内建虚拟探头。
• Chapter two detailedly presents the design of the boundary scan testing system which is in accordance with ieee . 1149 . correspondingly two special - used data registers are added , one of which is the scanning chain register and the other is the child scanning chain control - register
  文中第二章按照ieee . 1149标准详细设计了边缘扫描测试系统，相应增加了两个专用数据寄存器，其中一个为扫描链寄存器，一个为扫描子链控制寄存器。
• The majority of the test vectors are used to check the connection of the pins of the device . those vectors for connection test can be removed from the vector base for the device under test when deltascan is applied together with boundary scan test . the total vectors are therefore eliminated
  测试矢量中大多数是用于测试引脚之间是否有短路或有引脚开路情况的，引入deltascan测试ic的引脚的开路和短路情况后，就可从xc5210 _ tq144的测试矢量集中去掉合并与短路，开路测试有关的测试矢量，进一步减少了边界扫描所需的测试矢量。
• This thesis discusses the realization of pcbs ict production through a concrete example in which boundary scan technology is applied , and presents a new method to improve the test speed , based on the analysis of boundary scan circuit and means for vector creation . he applys boundary scan ( bs ) to boundary - scan device on the board where bs features by easy vector creation , need less knowledge of the device
  本文结合一个具体电路板在线测试实现，首先讨论了在ict中，采用边界扫描元件测试技术实现在线测试生产；并在分析归纳各种测试方法的基础上探索一种新的改进方法，即将deltascan技术与边界扫描技术相结合以减少测试矢量，增加测试速度的一种实用方法。
• And more than 70 % hardware are tested during microcode self - test since the execution of micro program can cover other data paths . boundary scan is designed according to ieee1149 . 1 , and some other instructions such as degug , runbist are provided to support internal fault testing , online debugging and built - in self - test besides the several necessary insructions . internal scan is implemented by partial scan , through this the boundary of logic component and user - cared system registers can be selected to be scanned
  Bist用于测试cpu的微码rom ,其它ram则利用微码rom中的微程序进行测试,而微程序的运行则可以顺带覆盖其它数据通路,从而使高达70 %的硬件得到测试;边界扫描按ieee1149 . 1标准设计,除必备的几条边界扫描指令外,还提供了debug 、 runbist等指令以支持内部故障测试、在线调试及内建自测试;内部扫描采用部分扫描策略,选择逻辑部件的边界及用户关心的系统寄存器进行扫描,从而实现了硬件逻辑划分,方便了后续的测试码产生和故障模拟,并为在线调试打下了基础。
• Finally the design of rs decoder in this chip is described as an example of the hardware / software co - design based on asip , the construction and application of asip is also analyzed . the fourth chapter introduces the design flow using eda tools based on standard cell , then it presents the dft of this chip in detail which uses following techniques : full scan , bist and boundary scan to improve the fault coverage
  第四章，在对本芯片的基于标准单元eda设计流程进行了简要说明基础上，对本芯片采用的可测试性设计进行了详细的分析和说明，本芯片中有机结合了多种可测试性设计技术：基于全扫描的方式、 bist测试技术、边界扫描技术，保证了很高的测试故障覆盖率。
• The main contents are as follows : the structure of mixed - signal circuit which newly - defined in ieee1149 . 4 std is analyzed in detail , especially anolog boundary module and test bus interface circuit . on the basis of mixed - signal boundary scan technology , a scheme of mixed - signal boundary - scan test system is presented and the hardwares are implemented , including the controller and display unit
  主要研究的内容以及所作的工作如下:详细分析了ieee1149 . 4标准中针对混合信号电路测试新增的结构,即模拟边界模块及测试接口电路。基于混合信号边界扫描技术标准,提出混合信号边界扫描控制器的设计方案并实现了其硬件设计,包括边界扫描控制模块、显示驱动模块等。