Longer paths tend to be sensitive to crosstalk - induced delay effects because of their short slack time 因此,超深亚微米工艺下,在设计验证、测试阶段需要对串扰问题给予认真对待。
Experimental results in this paper show our approaches can be efficiently used in delay testing for complex circuits with noise effects 实验表明,本文的方法可以应用在复杂超深亚微米电路的延时故障测试中,有一定推广价值。
Especially with the use and advancement of vdsm ( very - deep - sub - micron ) technology , the faults during manufacturing become more multiple and difficult to test 尤其是超深亚微米( vdsm )工艺的使用,生产过程中出现的故障也越来越多样、难测。
With the rapid developments of slsi technology , the system on a chip ( soc ) technology supported by very deep sub - micron ( vdsm ) and ip - reuse has become the developmental trend of international slsi and the ic mainstream in the 21st century 随着超大规模集成电路工艺技术的发展,以超深亚微米工艺和ip核复用技术为支撑的系统芯片技术( soc )是国际超大规模集成电路发展的趋势和二十一世纪集成电路技术的主流。
The rectilinear steiner minimal tree rsmt problem is one of the fundamental problems in physical design , especially in routing , which is known to be np - complete . this paper presents an algorithm , called aco - steiner , for rsmt construction based on ant colony optimization 制造工艺由超深亚微米vdsm进入到纳米nanometer阶段,作为物理设计physical design重要阶段之一的布线routing ,其算法研究与工具设计面临新的挑战。