Here we mainly research the metheds on video acquisition and video codec , as well as video data inter - communication . in this system , we use fpga , manufatured by altera co . ltd , to acquisite the image resource precisely . also we implement high speed and complex logic design to control the whole system and pc104 interface with it . here the captured image data is stored to sdr - sdram outside fpga . then it is compressed according to jpeg2000 compression standard . the compressed image streaming data is stored in sdr - sdram 在本设计中利用altera公司的cycloneep1c6的fpga芯片完成高清vga图像信号的精确采集,并利用其完成复杂而高速的逻辑控制及时序设计,实现了与pc104上位机接口程序设计,并将采集的数字视频信号存储在外扩存储空间sdr - sdram中;利用tidm642完成将采集到的数字图像信息按照jpeg2000压缩编码标准进行处理。
The hardware design for the system is introduced in detail , including dsp mini system , a / d conversion circuit and communication interface , also the logic design for cpld is described . and the software design is described in detail as followed , the software for the system is mainly implemented in dsp including the controls of the data - acquisition , data processing and submitting 详细介绍了系统的硬件设计和实现方案,包括dsp最小系统, a d转换通道,通信接口等;论述了如何使用cpld作为dsp与其外围器件之间的接口,并给出了详细的cpld内部逻辑设计过程。
The logic design of interface circuit is realized in verilog hardware description language ( hdl ) . function simulation is finished by modelsim software . after the synthesis , placing , routing and obtaining delay information by develop tool quartus ii4 . 0 , timing simulation is accomplished by modelsim software 接口电路的逻辑设计采用硬件描述语言veriloghdl ,先借助modelsim软件进行功能仿真验证,在quartusii4 . 0的集成开发环境中完成综合、布局布线并提取元器件和网线上的实际延迟信息后,再借助modelsim软件进行时序仿真验证。
At last , utilizing the object - oriented technology , we develop a engineer database system of die cad aiming at deficiency of the applying traditional database to engineer , introduce the logic design and architecture of engineer database system and discuss several key technologies of engineer database system 最后,针对传统数据库中工程应用中的不足之处,利用面向对象技术自行开发了冷冲模cad工程数据库系统,介绍了工程数据库系统的逻辑设计和系统的体系结构,并对工程数据库中的几个关键技术做了进一步的讨论。
In the logic design , the fundamentals and characteristics of ieee std . 1149 . 1 specification and usb protocol are introduced first of all . according to altera ’ s fpga cyclone , it analyzes the architecture and jtag instructions of boundary scan test ( bst ) . then the dissertation analyzes how to program cyclone device and offer the scheme of the design which is realized in verilog hdl by modelsim and quartus ii software 在接口逻辑设计中,首先分析ieee1149 . 1标准和usb协议,理解边界扫描测试和usb数据传输的工作方式,然后针对altera公司的fpga器件cyclone ,通过分析它的边界扫描测试结构和各种jtag指令,研究它的编程过程和编程特点,并提出设计方案。